Three New Multi-root Devices offer Four
On-Chip DMA Engines; Multiple NT, SSC, Ports
SUNNYVALE, Calif., September 6, 2011 – PLX Technology, Inc. (NASDAQ: PLXT), the leader in high-speed connectivity
solutions for the enterprise and the home, today expanded its PCI Express
(PCIe) Gen3 switch family with three new high-performance, feature-packed
devices compliant with the PCI Express Gen3 r1.0 Specification. The new PLX® ExpressLane™ PEX8749 (48-lanes,
18 ports), PEX8733 (32 lanes, 18-ports) and PEX8725 (24 lanes, 10 ports) PCIe Gen3
switches blend valuable innovation and high port counts to enable new, more
powerful designs in servers, storage and communications platforms. The three switches are available today with
production scheduled for Q4’11.
PLX was
the industry’s first vendor to launch PCIe Gen3 silicon more than one year ago and
remains the only company offering Gen3 switches. With the debut of these three new switches,
PLX is expanding its PCIe Gen3 portfolio to 11 highly flexible devices ranging
from 12 to 48 lanes, and three to 18 ports.
This leadership position has placed PLX at the forefront of Gen3 reference
designs by worldwide CPU, GPU and endpoint vendors who have been rigorously validating
and testing their own silicon and systems using PLX Gen3 devices. Numerous tier-one server and storage OEMs have
multiple designs underway using PLX PCIe Gen3 switches that are ready to be
launched when Gen3 enabled CPUs become available.
Integrated
into each new PLX PCIe Gen3 multi-root switch device are unique performancePAK™ features, including two
non-transparency (NT) ports, four direct memory access (DMA) engines, two
virtual channels (VCs), and up to 12 ports for spread spectrum clock (SSC) isolation.
The NT feature enables host failover and
redundancy and has been widely used by tier-one OEMs since it was developed in
early PCI technology. The on-chip DMA
engines enable designers to increase the performance of systems by moving data among
endpoints or between memory and endpoints without sacrificing CPU bandwidth. Support for two VCs enable users to prioritize
traffic to support desired quality of service (QoS). The SSC clock isolation for each x4 port of
the device allows designers to create large systems with each sub-system
running its own SSC clock.
PLX is
the only switch vendor that offered x16 ports on PCIe Gen1 and Gen2 switches,
and it continues to support x16 on today’s Gen3 devices. In addition to x16 and x8 ports, these switches
offer native x2 and x4 ports that enable development of large arrays of SSD
based systems with fewer switches. Also included is the support for PCIe specification
engineering change notices (ECNs) such as multicast, access control service
(ACS), alternative routing-ID interpretation (ARI), atomic operations, and optimized
buffer flush/fill (OBFF). PLX PCIe Gen3
devices are fully backwards-compatible with Gen2/Gen1 devices and recommended
for all new designs. The PLX Gen3
devices can be used to create Gen3 slots using their bridging capability in a
Gen2 platform.
“Next-generation
PCI Express-based systems benefit from switches with DMA, higher port counts
and non-transparency, providing a boost for Gen3 speeds, design flexibility and
range of applications,” said Jag Bolaria, senior analyst at Linley Group and
author of the report A Guide to
High-Speed Interconnects. “PLX is
addressing the market need for such switches that should help accelerate the
development of new communications, storage, server and graphics systems.”
“Being
the first to market with PCI Express Gen3 switches, having the industry’s
largest family of such devices, and offering a rich array of debug tools make
PLX the go-to vendor for PCIe-based designs in virtually every market segment,”
said David Raun, PLX vice president of marketing and business development. “Gen3 adoption is expected to be
significantly faster than was the transition to Gen2, and PLX is the silicon
provider in the best possible position to enable the industry’s next-generation
Gen3-based designs.”
As a premium
benefit for designers, the new switches are supported by exclusive PLX visionPAK™ system debug tools, such as Performance
Monitoring, Error Injection, Packet Generator, and the ability to measure both
width and height of a SerDes eye using PLX’s free software development kit
(SDK). The on-chip hardware debug
features, complemented by PLX’s SDK software, offer instant logic analyzer
support, high-speed scope view, pattern generation, and error injection -
capabilities that shed the cost of spending hundreds of thousands of dollars on test equipment. This proven SDK, used by designers worldwide for
thousands of PCIe-based products, has garnered the attention of numerous OEMs,
reducing their validation tool budgets and helping their products get to market
faster.
Press Graphic, Tools
·
A
complete designer toolkit, including databooks and hardware/software
development kits, can be found online at www.plxtech.com/gen3
Pricing, Availability
The new
PLX ExpressLane PEX8749, PEX8733 and PEX8725 PCIe Gen3 switches are available
today with production scheduled for Q4’11.
Volume pricing is $35.00 to $70.00.
About
PLX
PLX Technology, Inc. (NASDAQ: PLXT),
based in Sunnyvale, Calif., USA, is an industry-leading global provider of
semiconductor-based connectivity solutions primarily targeting the enterprise
and consumer markets. The company
develops innovative software-enriched silicon that enables product
differentiation, reliable interoperability and superior performance. www.plxtech.com. Follow PLX on Facebook,
Twitter
and YouTube.
ExpressLane, PLX Technology, and
the PLX Technology logo are trademarks or registered trademarks of PLX
Technology, Inc. All other product names
that appear in this material are for identification purposes only and are
acknowledged to be trademarks or registered trademarks of their respective
companies. Other names and brands may be
claimed as the property of others.
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